Operating systems
Portail informatique
Organisation
Presentation
Working remotely
Annals
Exam 2019
Exam 2020
Exam 2021
Exam 2022
Exam 2023
Annals (old formula)
CF1 2017
CF2 2017
CF1 2016
CF2 2016
CF1 2015
CF2 2015
CF1 2014
CF2 2014
CF1 2013
CF2 2013
CF1 2012
CF2 2012
CF1 2011
CF2 2011
CF1 2010
CF2 2010
CF1 2009
CF2 2009
CF1 2008
CF2 2008
CF1 2007
CF2 2007
CF1 2006
CF2 2006
CF1 2005
CF2 2005
CF1 2004
CF2 2004
CF1 2003
CF2 2003
Courses/Lab (old formula)
All the labs
Schedule
Teachers
GDB cheat-sheet
Resources
Partie 1 - Process
Class #1
Threads
Introduction - Slides
[pdf]
[html]
Introduction - Book
[pdf]
[html]
Slides
[pdf]
[html]
Book
[pdf]
[html]
Examples
Lecture recording [En]
Lab recording [En]
Lab
Class overview module
Stack and registers
Threads
Thread-safety, reentrancy
Thread synchronization
Class #2
Concurrent programming
Slides
[pdf]
[html]
Book
[pdf]
[html]
Examples
Lecture recording [En]
Lab recording [En]
Lab recording [Fr]
Lab
Pipe-based communication
IPC : message queue, shared memory, semaphores, mutex, condition
Classic synchronizatin patterns
Class #3
Synchronization
Slides
[pdf]
[html]
Book
[pdf]
[html]
Examples
Lecture recording [En]
Lab recording [En]
Lecture recording [Fr]
Lab recording [Fr]
Lab
Atomic operations
Implementing synchronization primitives
Futex
Class #4
System calls
Slides
[pdf]
[html]
Book
[pdf]
[html]
Lecture recording [En]
Lecture recording [Fr]
Lab recording [Fr]
Lab
2h30
System call concept
Introduction to the xv6 kernel
Implementing a system call
Class #5
Interrupts and scheduling
Slides
[pdf]
[html]
Book
[pdf]
[html]
Lecture recording [Fr]
Lab recording [Fr]
Lab
2h30
Memory bus, I/O bus
Processing an interrupt
Time management
Implementing an interrupt handler
Implementing a scheduler
Class #6
Sprint
Lab
3h
Code review and discussion
Part 2 - Memory management
Class #7
Virtual memory
Slides
[pdf]
[html]
Book
[pdf]
[html]
Examples
Lecture recording [En]
Lecture recording [Fr]
Lab recording [Fr]
Lab
3h
Virtual memory
Pagination
Page table, TLB
Memory space of a process
Memory allocation strategies
Implementing a memory cache
Class #8
Memory Management Unit
Lab
3h
Lab recording [Fr]
Memory management in an operating system
Shared memory
Class #9
Architecture
Slides
[pdf]
[html]
Book
[pdf]
[html]
Examples
Lecture recording [En]
Lab recording [En]
Lecture recording [Fr]
Lab recording [Fr]
Lab
3h
Sequential processor
Pipeline
Superscalar processor
Branch prediction
Vector instructions
Hyperthreading
Multi-core processor
NUMA architecture
How a cache works
Class #10
Sprint
Sprint
3h
Part 3 - I/O
Class #11
I/O
Slides
[pdf]
[html]
Book
[pdf]
[html]
Examples
Lecture recording [En]
Lecture recording [Fr]
Lab recording [Fr]
Lab
3h
Buffered / unbuffered IOs
mmap
Asynchronous IOs
Concurrency
Class #12
File systems
Slides
[pdf]
[html]
Book
[pdf]
[html]
Lecture recording [En]
Lecture recording [Fr]
Lab recording [Fr]
Lab
3h
TODO
Class #13
Synthesis: mini-project
Lab
3h
Lab recording [Fr]
TODO
Class #14
Sprint
Sprint
3h
Class #15
Exam
CF1 2024
3h
CF2
3h
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