Operating systems

Portail informatique

The CSC 4508 - Operating systems module is dispensed at Télécom SudParis in M1, and as part of IP Paris master of Computer Science (Parallel & Distributed Systems, and High Performance Data Analytics tracks).

The aim of the module is to introduce the main concepts of operating systems. In this module, you will learn how to:

  • Develop an application that interacts with the operating system
  • Develop a parallel application using processes or threads that interact
  • Explain the main internal mechanisms of an Operating System
  • Implement the main mechanisms in a toy operating system
 
User space
 
General
 
Kernel space

Resources

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  • Topics
    Resources
    Key concepts
  • Partie 1 - Process

  • Class #1
    Threads
    • Class overview module
    • Stack and registers
    • Threads
    • Thread-safety, reentrancy
    • Thread synchronization
  • Class #2
    Concurrent programming
    • Pipe-based communication
    • IPC : message queue, shared memory, semaphores, mutex, condition
    • Classic synchronizatin patterns
  • Class #3
    Synchronization
    • Atomic operations
    • Implementing synchronization primitives
    • Futex
  • Class #4
    System calls
    • System call concept
    • Introduction to the xv6 kernel
    • Implementing a system call
  • Class #5
    Interrupts and scheduling
    • Memory bus, I/O bus
    • Processing an interrupt
    • Time management
    • Implementing an interrupt handler
    • Implementing a scheduler
  • Class #6
    Sprint
      Lab
    3h
    • Code review and discussion
  • Part 2 - Memory management

  • Class #7
    Virtual memory
    • Virtual memory
    • Pagination
    • Page table, TLB
    • Memory space of a process
    • Memory allocation strategies
    • Implementing a memory cache
  • Class #8
    Memory Management Unit
    • Memory management in an operating system
    • Shared memory
  • Class #9
    Architecture
    • Sequential processor
    • Pipeline
    • Superscalar processor
    • Branch prediction
    • Vector instructions
    • Hyperthreading
    • Multi-core processor
    • NUMA architecture
    • How a cache works
  • Class #10
    Sprint
     
  • Part 3 - I/O

  • Class #11
    I/O
    • Buffered / unbuffered IOs
    • mmap
    • Asynchronous IOs
    • Concurrency
  • Class #12
    File systems
    TODO
  • Class #13
    Synthesis: mini-project
    TODO
  • Class #14
    Sprint
     
  • Class #15
    Exam
     
CM : Lecture       CI : Lecture + lab